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Publication Detail
Ultra low latency dataflow renderer
  • Publication Type:
    Journal article
  • Publication Sub Type:
    Article
  • Authors:
    Friston S, anthony steed , Steed A, Tilbury S, Gaydadjiev G
  • Publisher:
    IEEE
  • Publication date:
    02/09/2015
  • Journal:
    Proceedings of the 25th International Conference on Field Programmable Logic and Applications
  • Country:
    United Kingdom
Abstract
Reconfigurable hardware has been used before for low latency image synthesis. These are typically low level implementations with tight vertical integration. For example the apparatus of both Regan et al and Ng et al had the tracker driven by the same device performing the rendering. Reconfigurable hardware combined with the dataflow programming model can make application specific rendering hardware cost effective. Our sprite renderer has comparable scope to both prior examples, but our dataflow graph can be adapted to other use cases with an effort comparable to GPU shader programming.
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Dept of Computer Science
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