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Publication Detail
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP
  • Publication Type:
    Conference
  • Authors:
    Masselos K, Andreopoulos Y, Stouraitis T
  • Publisher:
    IEEE
  • Publication date:
    2006
  • Place of publication:
    Piscataway, US
  • Pagination:
    923, 926
  • Published proceedings:
    ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems: May 21-24, 2006 : Kos International Convention Centre (KICC), Island of Kos, Greece: Proceedings
  • ISBN-10:
    0780393899
  • Status:
    Published
  • Language:
    English
  • Keywords:
    digital signal processing chips, discrete wavelet transforms, image processing, multidimensional signal processing, scheduling
Abstract
Several input-traversal schedules have been proposed for the computation of the 2D discrete wavelet transform (DWT). In this paper, the row-column, the line-based and the block-based schedules for the 2D DWT computation are compared with respect to their execution time on a very long instruction word (VLIW) digital signal processor (DSP). Implementations of the wavelet transform according to the considered schedules have been developed. They are parameterized with respect to filter pair, image size, and number of decomposition levels. All implementations have been mapped on a VLIW DSP. Performance metrics for the implementations for a complete set of parameters have been obtained and compared. The experimental results show that each implementation performs better for different points of the parameter space.
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