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Publication Detail
A comparison of 2-D discrete wavelet transform computation schedules on FPGAs
  • Publication Type:
    Conference
  • Authors:
    Angelopoulou M, Masselos K, Cheung P, Andreopoulos Y
  • Publisher:
    IEEE Computer Society
  • Publication date:
    2006
  • Place of publication:
    Piscataway, US
  • Pagination:
    181, 188
  • Published proceedings:
    IEEE International Conference on Field Programmable Technology, 2006: FPT 2006
  • Editors:
    Constantinides GA,Mak W-K,Sirisuk P,Wiangtong T
  • ISBN-10:
    0780397290
  • Status:
    Published
  • Language:
    English
  • Keywords:
    discrete wavelet transforms, field programmable gate arrays
Abstract
When it comes to the computation of the 2D discrete wavelet transform (DWT), three major computation schedules have been proposed, namely the row-column, the line-based and the block-based. In this work, the lifting-based designs of these schedules are implemented on FPGA-based platforms to execute the forward 2D DWT, and their comparison is presented. Our implementations are optimized in terms of throughput and memory requirements, in accordance with the specifications of each one of the three computation schedules and the lifting decomposition. All implementations are parameterized with respect to the image size and the number of decomposition levels. Experimental results prove that the suitability of each implementation for a particular application depends on the given specifications, concerning the throughput and the hardware cost.
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