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Publication Detail
A Highly Accurate Spike Sorting Processor With Reconfigurable Embedded Frames for Unsupervised and Adaptive Analysis of Neural Signals
  • Publication Type:
  • Authors:
    Zamani M, Jiang D, Demosthenous A
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  • Published proceedings:
    European Solid-State Circuits Conference (ESSCIRC)
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  • Name of conference:
    European Solid-State Circuits Conference (ESSCIRC)
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Future implantable devices demand ultra-low power consumption with self-calibration capability providing real-time processing of biomedical signals. This paper introduces an adaptive processing framework for highly accurate on-chip spike sorting processing by learning the signal model in the recorded neural data. The novel adaptive spike sorting processor employs dual thresholding detection, adaptive feature extraction and online clustering with sorting threshold self-tuning capability. A prototype chip was fabricated in 180 nm CMOS technology. It achieves 84.5% overall clustering accuracy, provides up to 240X data reduction and consumes 148 μW of power from a 1.8 V supply voltage.
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