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Publication Detail
A new architecture for low power analogue convolutional decoders
Abstract
A new architecture for convolutional decoding, the modified feedback decoding algorithm (MFDA), is presented. For the specific codes considered, its error-correction performance compares very favourably to the truncated Viterbi algorithm (VA) but it requires less hardware. The realisation of its primary subsystem, an add-compare-select (ACS) circuit, is presented which can also be employed in analogue/digital realisations of the VA. Preliminary results indicate the switched-current ACS circuit described is faster, more compact, and uses less power than a digital ACS unit designed for the same level of resolution.
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Dept of Electronic & Electrical Eng
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